Based on Infineon’s RISC-V multicore real-time cluster architecture, the AURIX RC1 microcontroller family sets new standards for real-time compute and control for next-generation SDV, SDX, and Physical AI applications. Thanks to its performance, scalability, and comprehensive features for safety and security, connectivity, and edge AI, it is gaining significant momentum as it advances to the next level of increasingly powerful and forward-looking electronic designs.

PLS’ UDE supports users of the new AURIX RC1 microcontrollers with the same powerful and user-friendly debugging, tracing, and system analysis features as they are already accustomed to using with the current AURIX devices. Developers particularly benefit from simple and intuitive access to the entire AURIX RC1 microcontroller via a unified debugger user interface. This enables control of all cores for debugging, testing, and detailed system analysis without having to open separate instances of the debugger for the different cores. The UDE enables high-level language debugging of applications written in C/C++ as well as Rust. All common compilers are supported. Furthermore, the UDE can handle all implemented RISC-V instruction set extensions. All of UDE's proven multicore debugging features, such as synchronous run control and multicore breakpoints, are also available for the AURIX RC1.

As previously mentioned, using a virtual prototype based on the Synopsys Virtual Development Kit (VDK) enables software development for AURIX RC1-based projects to begin even before the first MCU samples are available. Since the UDE can be used as a front end for both the simulation model and the actual microcontroller, the subsequent transition to AURIX RC1 hardware is significantly simplified. The UAD2pro, UAD2next, or UAD3+ devices from the Universal Access Device family, in combination with the appropriate target adapter for the debug interface on the evaluation boards or on customer-specific hardware, ensure fast and reliable communication between the UDE debugger running on the PC and the AURIX RC1 MCUs.

To ensure the availability of feature-rich and reliable debugging tools right from the first production-ready AURIX RC1 silicon, PLS uses a hardware emulation environment provided by Infineon. This marks another milestone in the long-standing collaboration between Infineon and PLS, from which their joint customers benefit.

“As a long-standing Infineon Premium Partner, PLS’s goal is to provide system developers with mature tools for debugging, tracing, and testing as soon as new architectures and MCU families become available. We are committed to adapting our tools to the functional characteristics of Infineon Technologies’ AURIX RC1 microcontroller family even before the first silicon is available. This enables our customers to accelerate their development and bring market-ready products to market faster,” says Jens Braunes, Product Marketing Manager at PLS.

“We consider the introduction of our new AURIX RC1 family much beyond the new microcontroller architecture itself,” said Thomas Schneid, Vice President Software and Ecosystem Management at Infineon. “Our new open architecture based on RISC-V comes with a growing holistic ecosystem around it. Together with partners like PLS, we are creating an open and scalable software, tools and services environment that enables customers to build on their existing investments, simplify migration and accelerate innovation on AURIX RC1.”